Samsung Electronics has announced that has achieved considerable success in the development of 14-nanometer process technologies using FinFET transistors (analog transistors with the three-dimensional gate structure represented in the 22-nm process technology, Intel).
Samsung also announced that company has signed an agreement with ARM for 14-nm chips and physical libraries. This is not the first agreement between the companies, aiming to provide the market is ready for production systems on a chip.
The South Korean giant Samsung said that within the 14-nm FinFET, Samsung and its partners in the ecosystem – ARM, Cadence, Mentor and Synopsys – prepared several test chips, including a full processor ARM Cortex-A7 and chip-based on SRAM, capable of running on threshold voltages, along with the mass of analog solutions. It should be noted that the achievement stage Tape-out (Tape-out – Pre photo masks to print chips) for a full test of the crystal core ARM Cortex-A7 is a significant advance in semiconductor manufacturing to such subtle rules that will soon master the mass printing 14-nm mobile processors.
ARM Cortex-A7 with FinFET transistors will lead to still lower energy consumption of these simple cores that ARM proposes to use in conjunction with a much more powerful Cortex-A15 in the technology big.LITTLE, allowing to improve the balance between energy efficiency and performance of mobile solutions. 14-nm process FinFET technology – Samsung to reduce leakage current and to improve the dynamic power of processors in the growing market for mobile electronics.
Korean company Samsung said that the test chip Cortex-A7 has been developed it in collaboration with Cadence and ARM. Provide a means of synthesis of the Cadence (RTL to sign-off flow), built from a set of tools, pre-tested thoroughly to require double-forming a lithographic pattern of 20-nm process technology. Cadence worked closely with Samsung and ARM to optimize its technology for designing 14-nm FinFET-chips. ARM used the Cadence tools for creating libraries of 14-nm FinFET and design of the Tape-out core.
Samsung also collaborated with Synopsys, which provided new designed for three-dimensional structure of tools to optimize chip-based on FinFET-transistor, SRAM low-power-memory operating at close to the threshold voltage.
At the same time, Samsung said that it had extended cooperation with Mentor Graphics to create a means of testing and preparation for the production of chips based on 14-nm FinFET transistor technology. These tools are designed to save customers from Samsung unnecessary difficulties in the design, verification, optimization of joint production and post-design. Collaboration enhances the unique workflow features of Samsung, while helping designers to overcome the difficulties caused by the use of multiple patterns in lithography, FinFET-transistor and a high reliability of end products.
The important thing is that now Samsung is ready to provide customers with tool kits for developing new chips, so they can begin designing their products. Test models, guidance on design rules and technology requirements are developed on the basis of the results from the previously created in a research laboratory test of Samsung chips.
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